Electronic devices for the power supplies or other applications are conventionally provided in a protective, heat-dissipating package. Often, the device (e.g., a metal oxide semiconductor field-effect transistor, or "MOSFET") is attached to a lead-frame and connected to external leads by a wire bonding technique. The device is then encapsulated or "molded," wherein an encapsulant is formed about the device to yield a unitary, board-mountable package. One well-known configuration for board-mountable package is a so-called dual in-line package ("DIP") wherein electrical leads protrude from opposing sidewalls of the package. The leads are advantageously so arranged to allow the package to be mounted to a circuit board by various conventional soldering processes. DIPs are widely used for packaging integrated circuits, most often in telecommunications or computer-related environments.
In a power electronics environment, the packaged power devices are conventionally mounted directly to a printed wiring board or substrate, using either through-hole or surface-mounting techniques. The devices are then joined with other electronic components to form a circuit, perhaps to function as a modular power supply.
The power dissipation of the power devices is based on the electrical current passing through the devices and the electrical resistances therein. The electrical resistances generally include the internal electrical resistance of the device (e.g., R.sub.DS(on) of the MOSFET), the electrical resistance caused by interconnections within the encapsulated package (e.g., wire bonds) and electrical resistance caused by interconnections between the encapsulated package and the copper traces of the substrate. Depending on, for instance, the diameter of the bonding wire, the interconnection electrical resistance within the package may be several milliohms ("m.OMEGA.") to several tens of m.OMEGA.. Of course, reducing the electrical resistances is a continuing objective to reduce the overall power dissipation of the device. In conjunction therewith, reducing the interconnection electrical resistance within the power device is more important as a result of the advancement in the design of the power devices. As compared to the internal electrical resistance of the conventional power devices, the newer generation power devices have discernibly lower internal electrical resistances (e.g., a R.sub.DS(on) in the range of 4 to 20 m.OMEGA.) making the electrical resistances caused by the interconnections within the power device more critical.
In addition to the internal resistance concerns associated with the interconnections within the power device, there are physical considerations as well. As previously mentioned, new generation power devices, such as a Gallian Arsenide ("GaAs") power device, are exhibiting improved characteristics over the more conventional Silicon ("Si") based power devices. GaAs power devices are exhibiting advantages such as faster switching speeds and lower switching capacitances and losses. However, the new generation of power devices are structurally thinner (e.g., a thickness of 4 to 6 mils) and more brittle than the conventional Silicon-based devices. Thus, the previous methods of wire bonding including the use of heavy wires is not optimal with power devices, especially the new generation power devices.
As with other types of electronic components, the trend in the design of power supply module has been toward achieving increased power and device density and lower module profile. However, any improvements in power, density and profile cannot be at the expense of the thermal and electrical characteristics of the components and overall power supply.
One way to achieve higher power density without sacrificing thermal and electrical characteristics is to reduce the electrical and thermal resistances of the power device. A conventional technique to reduce the electrical and thermal resistances is to mount the bare die of the power devices directly to the substrate. The bare die is typically wire-bonded to the substrate; the bare device is then locally encapsulated in a process generally referred to as "glob-top." While this direct wire-bonding technique does reduce the profile of the power device on the substrate of the power module, it fails to reduce the electrical resistance of the device adequately, because the heavy wire bonds are still required to complete the electrical connections.
Accordingly, what Is needed in the art is a technique for attaching an unpackaged power device, such as a MOSFET, to a substrate such that the interconnection resistance is reduced, the power and device density are increased and the module profile is decreased without sacrificing the thermal and electrical characteristics of the device. This technique should also facilitate the attachment of new generation power devices, such as the GaAs based power devices, to the substrate. Preferably, the technique should be cost-effective and suitable for mass production.